基于FPGA的数字音频频率均衡器的研究与设计

基于FPGA的数字音频频率均衡器的研究与设计(任务书,开题报告,论文12000字)
摘要
改革开放以来，人们逐渐实现了物质生活上的追求，慢慢开始追求精神上的丰富，对音乐质量的要求随之提高。存储器件的容量扩大也方便了更高质量的音频文件的存储。均衡器作为调节音频音效及质量的有效器件，现在使用的越来越广泛。均衡器一般有两种实现方法，一是利用各种数字滤波器连接组成的数字均衡器，其灵活性和有效性较高；另一则是利用各种有源无源滤波器组成的模拟均衡器，它的特性受到外界环境的影响，如温度、压力等。导致其性质不是很稳定，而且其造价比数字滤波器高出许多。
本课题的研究目标是实现以FPGA为基础的数字音频频率均衡器，可实现十段可调的图示均衡功能。
本文的研究内容涉及多段滤波和增益调节等方面，重点在于各数字滤波器的窗口函数选择及设计，FPGA硬件语言编写。具体研究内容包括:数模模数转换、滤波器选择、窗函数选择及参数设计。研究方法是：首先进行理论分析和算法研究、使用MATLAB来设计确定滤波器系数并对系数进行了量化、使用Verilog HDL硬件语言编程及激励文件的编写、Modelsim进行功能仿真。
关键词：D/A转换；数字滤波器；均衡；FPGA
 
Abstract
Since the reform and opening up，people have gradually realized the pursuit of material life，slowly began to pursue spiritual enrichment，and the demand for music quality has increased. The increased capacity of storage devices also facilitates the storage of more sophisticated audio files. As an effective device for regulating audio effects and quality， equalizers are now used more and more widely. The audio frequency equalizer is the most important auxiliary adjustment device in high-quality audio，playing an important role in the modification and adjustment of sound effects. There are two ways to implement an equalizer. One is to use a digital equalizer composed of various digital filters to connect them. The flexibility and effectiveness of the equalizer are higher. The other is the use of various active and passive filters for analog equalization. The device，its characteristics affected by the external environment，such as temperature，pressure，etc.，resulting in its nature is not very stable，and its cost is much higher than the digital filter.
The research goal of this topic is to realize a digital audio frequency equalizer based on FPGA，which can realize 10 adjustable graphic equalization functions.
The research content of this paper involves multi-stage filtering and gain adjustment， etc. The emphasis is on the selection and design of the window function of each digital filter， FPGA hardware language，the specific research content includes: digital-analogue-to-analog conversion，filter selection，window function selection and Parameter design. The research methods are as follows: Firstly，theoretical analysis and algorithm research are conducted. MATLAB is used to design and determine the filter coefficients. The coefficients are quantified. Verilog HDL hardware language programming and excitation file writing are used. Modelsim performs functional simulation.
KeyWords: D/A conversion；digital filter；equalization；FPGA
 

目录
摘要    I
Abstract    II
第1章 绪论    1
1.1 课题的研究背景及意义    1
1.2 国内外研究现状    2
1.3 课题的研究目标    3
1.4 课题的研究内容    3
第2章 均衡原理及整体设计构想    4
2.1 均衡原理    4
2.2 整体设计构想    4
2.3 本章小结    5
第3章 基于FPGA的图示均衡器的设计与仿真    6
3.1 FPGA概述    6
3.1.1基本概念及发展历程    6
3.1.2设计流程及注意事项    7
3.2 数模、模数转换模块设计    10
3.3 均衡控制模块设计    10
3.4 均衡模块设计    10
3.4.1滤波器设计    12
3.4.2 均衡器设计    17
3.5 本章小结    20
第4章 总结与展望    21
4.1 总结    21
4.2 展望    21
参考文献    23
致  谢    24