ASIC和FPGA的混合系统

ASIC和FPGA的混合系统(中文4700字,英文3200字)
FPGA是英文Field Programmable Gate Array的缩写，即现场可编程门阵列，它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路（ASIC）领域中的一种半定制电路而出现的，既解决了定制电路的不足，又克服了原有可编程器件门电路数有限的缺点。FPGA采用了逻辑单元阵列LCA（Logic Cell Array）这样一个新概念，我们知道它的内部包括可配置逻辑模块CLB（Configurable Logic Block）、输出输入模块IOB（Input Output Block）和内部连线（Interconnect）三个部分。
FPGA的基本特点主要有：
1.采用FPGA设计ASIC电路，用户不需要投片生产，就能得到合用的芯片
2.FPGA。可做其它全定制或半定制ASIC电路的中试样片
3.FPGA内部有丰富的触发器和I／O引脚。
    4.FPGA是ASIC电路中设计周期最短、开发费用最低、风险最小的器件之一。
5.FPGA采用高速CHMOS工艺，功耗低，可以与CMOS、TTL电平兼容。
FPGA是由存放在片内RAM中的程序来设置其工作状态的，因此，工作时需要对片内的RAM进行编程。用户可以根据不同的配置模式，采用不同的编程方式。

A hybrid ASIC and FPGA Architecture
FPGA is English Field Programmable Gate Array abbreviation, namely the scene programmable gate array, it is the product which in PAL, GAL, EPLD and so on in the programmable component foundation further develops. It is took in the special-purpose integrated circuit (ASIC) domain one kind partly has custom-made, both solves has had custom-made the electric circuit which the electric circuit appears the insufficiency, and has overcome the original programmable component gate number limited shortcoming.
FPGA used logical unit array LCA (Logic Cell Array) this kind of new concept, the interior including has been possible to dispose logical module CLB (Configurable Logic Block), output load module IOB (Input Output Block) and internal segment (Interconnect) three parts. The FPGA essential feature mainly has:
1)    Uses FPGA to design the ASIC electric circuit, the user does not need to throw the piece production, can obtain the chip which comes in handy. - - 2) FPGA may make other all to have custom-made or partly to have custom-made the ASIC electric circuit the experimental preview.
2)    The FPGA interior has the rich trigger and the I/O pin.
3)    FPGA is in the ASIC electric circuit designs the cycle to be shortest, the development cost is lowest, one of risk smallest components.
4)    FPGA is in the ASIC electric circuit designs the cycle to be shortest, the development cost is lowest, one of risk smallest components.
5)    FPGA uses the high speed CHMOS craft, the power loss is low, may and CMOS, the TTL level is compatible.
It can be said that, the FPGA chip is the small batch system enhances the system integration rate, one of reliable best choices. FPGA is by deposits the procedure establishes its active status in internal RAM, therefore, time work needs to carry on the programming to internal RAM .The user may act according to the different disposition pattern, selects the different programming method.